clk: qoriq: add more PLL divider clocks support

More PLL divider clocks are needed by clock consumer IP. So enlarge
the PLL divider array to accommodate more divider clocks.

Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Yuantian Tang 2019-04-22 17:15:09 +08:00 • committed by Stephen Boyd
commit cc61ab9ba2