drm/vc4: hvs: Correct interrupt masking bit assignment for HVS5

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[ Upstream commit 87551ec650 ]

HVS5 has moved the interrupt enable bits around within the
DISPCTRL register, therefore the configuration has to be updated
to account for this.

Fixes: c54619b0bf ("drm/vc4: Add support for the BCM2711 HVS5")
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Link: https://lore.kernel.org/r/20221207-rpi-hvs-crtc-misc-v1-4-1f8e0770798b@cerno.tech
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Sasha Levin <sashal@kernel.org>

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Dave Stevenson 2022-12-07 12:53:15 +01:00 • committed by Greg Kroah-Hartman

parent 22134a4f02

commit cc6b67e907

2 changed files with 44 additions and 18 deletions

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52

drivers/gpu/drm/vc4/vc4_hvs.c

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10

drivers/gpu/drm/vc4/vc4_regs.h

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