drm/amd/display: Avoid unnecessary pixel rate divider programming

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[Why]
Programming pixel rate divider when FIFO is enabled can cause FIFO error.

[How]
Skip divider programming when divider values are the same to prevent FIFO
error.

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Acked-by: Jasdeep Dhillon <jdhillon@amd.com>
Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Taimur Hassan 2022-09-13 18:35:20 -04:00 • committed by Alex Deucher

parent 17caab0f0b

commit cc8dee689a

1 changed files with 53 additions and 0 deletions

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drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c

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