From ccce4835a7ee8ece258e5d07505c9adb531ae87b Mon Sep 17 00:00:00 2001 From: Quentin Strydom Date: Fri, 12 Jun 2026 11:28:31 +0100 Subject: [PATCH] staging: rtl8723bs: hal: fix space-before-tab warnings in HalPhyRf_8723B.c Remove spaces before tabs in comments to match kernel coding style. Signed-off-by: Quentin Strydom Link: https://patch.msgid.link/20260612102834.39935-4-qstrydom0@gmail.com Signed-off-by: Greg Kroah-Hartman --- drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c b/drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c index 70b68f473d58..91fffa364ec8 100644 --- a/drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c +++ b/drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c @@ -354,12 +354,12 @@ static u8 phy_PathA_IQK_8723B( /* leave IQK mode */ PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000); - /* enable path A PA in TXIQK mode */ + /* enable path A PA in TXIQK mode */ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x18000); PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0003f); PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xc7f87); - /* disable path B PA in TXIQK mode */ + /* disable path B PA in TXIQK mode */ /* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xed, bRFRegOffsetMask, 0x00020); */ /* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0x43, bRFRegOffsetMask, 0x40ec1); */ @@ -600,7 +600,7 @@ static u8 phy_PathA_RxIQK8723B( regEAC = PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_After_IQK_A_2, bMaskDWord); regEA4 = PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_Before_IQK_A_2, bMaskDWord); - /* PA/PAD controlled by 0x0 */ + /* PA/PAD controlled by 0x0 */ /* leave IQK mode */ PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000); PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x780); @@ -637,12 +637,12 @@ static u8 phy_PathB_IQK_8723B(struct adapter *padapter) /* leave IQK mode */ PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000); - /* in TXIQK mode */ + /* in TXIQK mode */ /* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); */ /* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x20000); */ /* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0003f); */ /* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xc7f87); */ - /* enable path B PA in TXIQK mode */ + /* enable path B PA in TXIQK mode */ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xed, 0x20, 0x1); PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0x43, bRFRegOffsetMask, 0x30fc1); @@ -873,7 +873,7 @@ static u8 phy_PathB_RxIQK8723B(struct adapter *padapter, bool configPathB) regEAC = PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_After_IQK_A_2, bMaskDWord); regEA4 = PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_Before_IQK_A_2, bMaskDWord); - /* PA/PAD controlled by 0x0 */ + /* PA/PAD controlled by 0x0 */ /* leave IQK mode */ /* PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, 0xffffff00, 0x00000000); */ /* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_B, 0xdf, bRFRegOffsetMask, 0x180); */ @@ -1322,7 +1322,7 @@ static void phy_IQCalibrate_8723B( const u32 retryCount = 2; /* Note: IQ calibration must be performed after loading */ - /* PHY_REG.txt , and radio_a, radio_b.txt */ + /* PHY_REG.txt , and radio_a, radio_b.txt */ /* u32 bbvalue; */ @@ -1554,7 +1554,7 @@ void PHY_IQCalibrate_8723B( rOFDM0_RxIQExtAnta }; /* u32 Path_SEL_BB = 0; */ - u32 GNT_BT_default; + u32 GNT_BT_default; if (!ODM_CheckPowerStatus(padapter)) return; @@ -1745,7 +1745,7 @@ void PHY_IQCalibrate_8723B( void PHY_LCCalibrate_8723B(struct dm_odm_t *pDM_Odm) { bool bSingleTone = false, bCarrierSuppression = false; - u32 timeout = 2000, timecount = 0; + u32 timeout = 2000, timecount = 0; if (!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) return;