drm/i915: Setup DPLL/DPLLMD for DSI too on VLV/CHV

Browse source

Set up DPLL and DPLL_MD even when driving DSI output on VLV/CHV. While
the DPLL isn't used to provide the clock we still need the refclock, and
it appears that the pixel repeat factor also has an effect on DSI
output. So set up eveyrhing in DPLL and DPLL_MD as we would do for
DP/HDMI/VGA, but don't actually enable the DPLL or configure the
dividers via DPIO.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1460488478-18311-2-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Tested-by: Jani Nikula <jani.nikula@intel.com>

...

This commit is contained in:

Ville Syrjälä 2016-04-12 22:14:34 +03:00

parent da6110bcbc

commit cd2d34d9b6

2 changed files with 80 additions and 68 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

120

drivers/gpu/drm/i915/intel_display.c

View file

28

drivers/gpu/drm/i915/intel_dsi.c

View file