drm/amdgpu: add pcie cap module parameters (v2)

Allows the user to force the supported pcie gen and lane
config on both the asic and the chipset.
Useful for debugging pcie problems and for virtualization
where we may not be able to query the pcie bridge caps.

Default to:
gen: chipset 1/2, asic 1/2/3
lanes: 1/2/4/8/16

v2: fix bare metal case

Reviewed-by: monk liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2016-02-04 10:21:23 -05:00
commit cd474ba0d6
3 changed files with 92 additions and 65 deletions