KVM: x86/mmu: Ignore CR0 and CR4 bits in nested EPT MMU role

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Do not incorporate CR0/CR4 bits into the role for the nested EPT MMU, as
EPT behavior is not influenced by CR0/CR4.  Note, this is the guest_mmu,
(L1's EPT), not nested_mmu (L2's IA32 paging); the nested_mmu does need
CR0/CR4, and is initialized in a separate flow.

Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20210622175739.3610207-23-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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Sean Christopherson 2021-06-22 10:57:07 -07:00 • committed by Paolo Bonzini

parent af09897229

commit cd6767c334

1 changed files with 3 additions and 1 deletions

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arch/x86/kvm/mmu/mmu.c

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