clk: imx8mq: add 27m phy pll ref clock

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According to pll documentation, the 3rd pll ref clock should be
hdmi phy 27m clock, not dummy clock.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20220225090002.2497057-3-peng.fan@oss.nxp.com
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>

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Peng Fan 2022-02-25 17:00:02 +08:00 • committed by Abel Vesa

parent 3123109284

commit cdc86e473b

1 changed files with 1 additions and 1 deletions

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drivers/clk/imx/clk-imx8mq.c

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