powerpc/eeh: PERR/SERR bit settings during EEH device recovery

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The following patch restores the PERR and SERR bits in the PCI
command register during an EEH device recovery. We have found
at least one case (an Agilent test card) where the PERR/SERR
bits are set to 1 by firmware at boot time, but are not restored
to 1 during EEH recovery.  The patch fixes the Agilent card
problem.  It has been tested on several other EEH-enabled cards
with no regressions.

Signed-off-by: Mike Mason <mmlnx@us.ibm.com>
Acked-by: Linas Vepstas <linasvepstas@gmail.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

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Mike Mason 2008-07-09 02:04:35 +10:00 • committed by Benjamin Herrenschmidt

parent b887ec620a

commit cde274c0c7

1 changed files with 14 additions and 0 deletions

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arch/powerpc/platforms/pseries/eeh.c

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