drm/amd/display: Fix DC definition of PMFW Pstate table for DCN316

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[Why]

During DC init, we read power management tables from PMFW. This info is
exchanged in the form of a binary blob inside gpu memory. In order to
parse the binary blob, the correct struct needs to be used.

[How]

Fix dcn316's definition of the DfPstateTable_t struct to align with PMFW

Signed-off-by: Leo Li <sunpeng.li@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

This commit is contained in:

Leo Li 2022-02-24 12:06:22 -05:00 • committed by Alex Deucher

parent 2656fd230d

commit ce075e75e5

2 changed files with 19 additions and 1 deletions

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11

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

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9

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.h

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