MIPS: OCTEON: Add support for OCTEON III interrupt controller.

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Add irq_chip support for both IPI and "normal" interrupts of the CIU3
controller.  Document the device tree binding for the CIU3.

Some functions are non-static as they will be used by follow-on
support for MSI-X.

Signed-off-by: David Daney <david.daney@cavium.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: devicetree@vger.kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12500/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

...

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David Daney 2016-02-09 11:00:11 -08:00 • committed by Ralf Baechle

parent 9bc2223995

commit ce210d35bb

3 changed files with 695 additions and 1 deletions

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27

Documentation/devicetree/bindings/mips/cavium/ciu3.txt

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650

arch/mips/cavium-octeon/octeon-irq.c

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19

arch/mips/include/asm/octeon/octeon.h

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