drm/msm/a6xx: Add missing BIT(7) to REG_A6XX_UCHE_CLIENT_PF

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Downstream always set BIT(7)

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Patchwork: https://patchwork.freedesktop.org/patch/568930/

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Danylo Piliaiev 2023-11-25 11:11:50 -08:00 • committed by Rob Clark

parent 6c15808d9b

commit cf1aaa7d4a

1 changed files with 1 additions and 1 deletions

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drivers/gpu/drm/msm/adreno/a6xx_gpu.c

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