drm/i915/skl: distribute DDB based on panel resolution

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We distribute DDB equally among all pipes irrespective of display
buffer requirement of each pipe. This leads to a situation where high
resolution y-tiled display can not be enabled with 2 low resolution
displays.

Main contributing factor for DDB requirement is width of the display.
This patch make changes to distribute ddb based on display width.
So display with higher width will get bigger chunk of DDB.

Changes Since V1:
 - pipe_size/ddb_size will not overflow u16 so use appropriate
   data-types during computation (Chris)
Changes Since V2:
 - avoid redundancy and possible truncation errors (Chris)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107113
Cc: raviraj.p.sitaram@intel.com
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180801151113.5337-1-mahesh1.kumar@intel.com

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This commit is contained in:

Mahesh Kumar 2018-08-01 20:41:13 +05:30 • committed by Maarten Lankhorst

parent aaa023782f

commit cf1f697acb

1 changed files with 40 additions and 15 deletions

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drivers/gpu/drm/i915/intel_pm.c

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