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drm/amdkfd: allow 255 queues per process on GFX 12.1.0
GFX 12.1.0 queues are managed by MES, not by the HWS runlist, so the 127 queue limit does not apply. The topology advertises 32 CP queues plus 16 SDMA engines with 6 queues each, so creating every queue needs 128 and the last one fails with -ENOSPC. Signed-off-by: Horatio Zhang <hongkun.zhang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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