drm/i915: CP_IRQ handling for DP HDCP2.2 msgs

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Implements the
	Waitqueue is created to wait for CP_IRQ
	Signaling the CP_IRQ arrival through atomic variable.
	For applicable DP HDCP2.2 msgs read wait for CP_IRQ.

As per HDCP2.2 spec "HDCP Transmitters must process CP_IRQ interrupts
when they are received from HDCP Receivers"

Without CP_IRQ processing, DP HDCP2.2 H_Prime msg was getting corrupted
while reading it based on corresponding status bit. This creates the
random failures in reading the DP HDCP2.2 msgs.

v2:
  CP_IRQ arrival is tracked based on the atomic val inc [daniel]
  Recording the reviewed-by Daniel from IRC.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/1550338640-17470-16-git-send-email-ramalingam.c@intel.com

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This commit is contained in:

Ramalingam C 2019-02-16 23:07:02 +05:30 • committed by Daniel Vetter

parent 2d4254e506

commit cf9cb35ff7

3 changed files with 35 additions and 15 deletions

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31

drivers/gpu/drm/i915/intel_dp.c

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8

drivers/gpu/drm/i915/intel_drv.h

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11

drivers/gpu/drm/i915/intel_hdcp.c

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