drm/i915/icl: Implement gen11 flush including tile cache

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Add tile cache flushing for gen11. To relive us from the
burden of previous obsolete workarounds, make a dedicated
flush/invalidate callback for gen11.

To fortify an independent single flush, do post
sync op as there are indications that without it
we don't flush everything. This should also make this
callback more readily usable in tgl (see l3 fabric flush).

v2: whitespacing

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190815083055.14132-1-mika.kuoppala@linux.intel.com

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Mika Kuoppala 2019-08-15 11:30:53 +03:00 • committed by Chris Wilson

parent 6f6333ba50

commit cfba6bd8b0

2 changed files with 61 additions and 1 deletions

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1

drivers/gpu/drm/i915/gt/intel_gpu_commands.h

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61

drivers/gpu/drm/i915/gt/intel_lrc.c

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