spi: davinci: remove unnecessary data transmit on CS disable

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On TI DaVinci's SPI controller, the SPIDAT1 register which
controls the chip slect status, also has data transmit register
in the lower 16 bits. Writing to the whole 32-bits triggers
an additional data transmit every time the chip select is disabled.

While most SPI slaves cope-up with this, some cannot. This
patch fixes this by doing a 16-bit write on the upper half
of the SPIDAT1 register

While at it, group the SPIGCR1 register related defines seperately
from SPIDAT1 register defines.

Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>

...

This commit is contained in:

Brian Niebuhr 2010-08-12 12:27:33 +05:30 • committed by Sekhar Nori

parent 7978b8c385

commit cfbc5d1d8f

1 changed files with 8 additions and 12 deletions

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drivers/spi/davinci_spi.c

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