drm/amdkfd: fix cu mask for asics with wgps

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GFX10 and up have work group processors (WGP) and WGP mode is the native
compile mode.

KFD and ROCr have no visibility into whether a dispatch is operating
in CU or WGP mode.

Enforce CU masking to be pairwise continguous in enablement and
round robin distribute CUs across the SEs in a pairwise manner to
assume WGP mode at all times.

Signed-off-by: Jonathan Kim <jonathan.kim@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

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Jonathan Kim 2022-06-26 21:35:10 -04:00 • committed by Alex Deucher

parent 6a4a1f6054

commit cff35798fa

2 changed files with 22 additions and 5 deletions

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12

drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c

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15

drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c

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