arm64: dts: rockchip: Enable HDMI0 PHY clk provider on RK3588

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Since commit c4b09c5620 ("phy: phy-rockchip-samsung-hdptx: Add clock
provider support"), the HDMI PHY PLL can be used as an alternative and
more accurate pixel clock source for VOP2 to improve display modes
handling on RK3588 SoC.

Add the missing #clock-cells property to allow using the clock provider
functionality of HDMI0 PHY.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Tested-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://lore.kernel.org/r/20250204-vop2-hdmi0-disp-modes-v3-4-d71c6a196e58@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

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Cristian Ciocaltea 2025-02-04 14:40:07 +02:00 • committed by Heiko Stuebner

parent 33b561eb66

commit d0f1773877

1 changed files with 1 additions and 0 deletions

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arch/arm64/boot/dts/rockchip/rk3588-base.dtsi

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