scsi: ufs: exynos: Add support for Tensor gs101 SoC

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Add a dedicated compatible and drv_data with associated hooks for gs101 SoC
found on Pixel 6.

Note we make use of the previously added EXYNOS_UFS_OPT_UFSPR_SECURE
option, to skip initialisation of UFSPR registers as these are only
accessible via SMC call.

EXYNOS_UFS_OPT_TIMER_TICK_SELECT option is also set to select tick
source. This has been done so as not to effect any existing platforms.

DBG_OPTION_SUITE on gs101 has different address offsets to other SoCs so
these register offsets now come from uic_attr struct.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Link: https://lore.kernel.org/r/20240426122004.2249178-7-peter.griffin@linaro.org
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Will McVicker <willmcvicker@google.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

...

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Peter Griffin 2024-04-26 13:20:04 +01:00 • committed by Martin K. Petersen

parent 6f9f0d564b

commit d11e0a318d

2 changed files with 160 additions and 0 deletions

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146

drivers/ufs/host/ufs-exynos.c

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14

drivers/ufs/host/ufs-exynos.h

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