drm/i915/skl: Restore pipe interrupt registers after power well enabling

Browse source

The pipe interrupt registers are in the actual pipe power well, so we
need to restore them when re-enable the corresponding power well.

I've also copied what we do on HSW/BDW for VGA, even if the we haven't
enabled unclaimed registers just yet.

v2: Don't run skl_power_well_post_enable() if the power well is already
    enabled (Paulo)

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

...

This commit is contained in:

Damien Lespiau 2015-03-06 18:50:51 +00:00 • committed by Daniel Vetter

parent 510e6fdd8f

commit d14c034313

2 changed files with 35 additions and 0 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

4

drivers/gpu/drm/i915/i915_irq.c

View file

31

drivers/gpu/drm/i915/intel_runtime_pm.c

View file