drm/i915: Leave DPLL ref clocks on

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We enable the DPLL refclock already when bringing up the cmnlane power
well, so also leave it on when otherwise disabling the DPLL.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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Ville Syrjälä 2014-06-28 02:03:59 +03:00 • committed by Daniel Vetter

parent d49a340d6e

commit d17ec4ced6

1 changed files with 1 additions and 1 deletions

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drivers/gpu/drm/i915/intel_display.c

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