mtd: spi-nor: Fix wrong TB selection of GD25Q256

For GD25Q256, wrong SR bit for top/bottom selection is being used.
Fix it to use appropriate bit.

Signed-off-by: Jungseung Lee <js07.lee@samsung.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
This commit is contained in:
Jungseung Lee 2019-12-02 15:35:07 +09:00 • committed by Tudor Ambarus
commit d1f4acb89c
No known key found for this signature in database
GPG key ID: 4B554F47A58D14E9