drm/amd/display: Support vertical interrupt 0 for all dcn ASIC

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[Why]
When CONFIG_DRM_AMD_SECURE_DISPLAY is enabled, it will try
to register vertical interrupt 0 for specific task.

Currently, only dcn10 have defined relevant info for vertical interrupt
0. If we enable CONFIG_DRM_AMD_SECURE_DISPLAY for other dcn ASIC, will
get DC_IRQ_SOURCE_INVALID while calling dc_interrupt_to_irq_source() and
cause pointer errors.

[How]
Add support of vertical interrupt 0 for all dcn ASIC.

v2: squash in build fix (Alex)

Signed-off-by: Wayne Lin <Wayne.Lin@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

This commit is contained in:

Wayne Lin 2021-03-10 23:40:01 +08:00 • committed by Alex Deucher

parent 660d540640

commit d1fa156809

4 changed files with 137 additions and 0 deletions

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31

drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c

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38

drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c

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38

drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c

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30

drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c

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