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Merge branch 'dpll-zl3073x-add-ref-sync-pair-support'
Ivan Vecera says: ==================== dpll: zl3073x: add ref-sync pair support This series adds Reference-Sync pair support to the ZL3073x DPLL driver. A Ref-Sync pair consists of a clock reference and a low-frequency sync signal (e.g. 1 PPS) where the DPLL locks to the clock reference but phase-aligns to the sync reference. Patches 1-3 are preparatory cleanups and helper additions: - Clean up esync get/set callbacks with early returns and use the zl3073x_out_is_ndiv() helper - Convert open-coded clear-and-set bitfield patterns to FIELD_MODIFY() - Add ref sync control and output clock type accessor helpers Patch 4 adds the 'ref-sync-sources' phandle-array property to the dpll-pin device tree binding schema and updates the ZL3073x binding examples. Patch 5 implements the driver support: - ref_sync_get/set callbacks with frequency validation - Automatic sync source exclusion from reference selection - Device tree based ref-sync pair registration Tested and verified on Microchip EDS2 (pcb8385) development board. ==================== Link: https://patch.msgid.link/20260408102716.443099-1-ivecera@redhat.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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