DEVICETREE: Add bindings for the ATH79 DDR controllers

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The DDR controller of the ARxxx and AR9xxx families provides an
interface to flush the FIFO between various devices and the DDR.
This is mainly used by the IRQ controller to flush the FIFO before
running the interrupt handler of such devices.

Signed-off-by: Alban Bedel <albeu@free.fr>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

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Alban Bedel 2015-05-31 01:52:26 +02:00 • committed by Ralf Baechle

parent 03c8c407a8

commit d25b4f65bf

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Documentation/devicetree/bindings/memory-controllers/ath79-ddr-controller.txt

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