drm/amdgpu: Pin MMIO/DOORBELL BO's in GTT domain

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MMIO/DOORBELL BOs encode control data and should be pinned in GTT
domain before enabling PCIe connected peer devices in accessing it

Signed-off-by: Ramesh Errabolu <Ramesh.Errabolu@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Ramesh Errabolu 2021-11-08 23:44:16 -06:00 • committed by Alex Deucher

parent f441dd33db

commit d25e35bc26

1 changed files with 69 additions and 0 deletions

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drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

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