mmc: sdhci-pci-gli: Set SDR104's clock to 205MHz and enable SSC for GL9767

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Set GL9767 SDR104's clock to 205MHz and enable SSC feature
depend on register 0x888 BIT(1).

Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
Signed-off-by: Victor Shih <victor.shih@genesyslogic.com.tw>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20230609071441.451464-3-victorshihgli@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

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Victor Shih 2023-06-09 15:14:39 +08:00 • committed by Ulf Hansson

parent f3a5b56c12

commit d275435551

1 changed files with 134 additions and 1 deletions

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drivers/mmc/host/sdhci-pci-gli.c

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