drm/bridge: tc358768: fix PLL parameters computation

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[ Upstream commit 6a4020b4c6 ]

According to Toshiba documentation the PLL input clock after the divider
should be not less than 4MHz, fix the PLL parameters computation
accordingly.

Fixes: ff1ca6397b ("drm/bridge: Add tc358768 driver")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Robert Foss <rfoss@kernel.org>
Signed-off-by: Robert Foss <rfoss@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20230427142934.55435-3-francesco@dolcini.it
Signed-off-by: Sasha Levin <sashal@kernel.org>

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Francesco Dolcini 2023-04-27 16:29:27 +02:00 • committed by Greg Kroah-Hartman

parent c4cf126320

commit d2aad3c1e4

1 changed files with 5 additions and 1 deletions

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drivers/gpu/drm/bridge/tc358768.c

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