clk: tegra: Fix wrong value written to PLLE_AUX

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The value written to PLLE_AUX was incorrect due to a wrong variable
being used. Without this fix SATA does not work.

Cc: stable@vger.kernel.org
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: improved changelog]

...

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Tuomas Tynkkynen 2014-05-16 16:50:20 +03:00 • committed by Mike Turquette

parent 8e33f91a0b

commit d2c834abe2

1 changed files with 1 additions and 1 deletions

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drivers/clk/tegra/clk-pll.c

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