iommu/amd: Workaround for ERBT1312

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Work around an IOMMU  hardware bug where clearing the
EVT_INT or PPR_INT bit in the status register may race with
the hardware trying to set it again. When not handled the
bit might not be cleared and we lose all future event or ppr
interrupts.

Reported-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Joerg Roedel <joro@8bytes.org>

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Joerg Roedel 2013-04-18 17:55:04 +02:00

parent 7d8bfa26f2

commit d3263bc297

1 changed files with 26 additions and 8 deletions

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drivers/iommu/amd_iommu.c

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