iio: adc: ad4080: add support for AD4081

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Add support for AD4081 20-bit SAR ADC. The AD4081 has the same
resolution as AD4080 (20-bit) but differs in LVDS CNV clock count
maximum (2 vs 7).

Changes:
- Add AD4081_CHIP_ID definition (0x0051)
- Create ad4081_channel with 20-bit resolution and 32-bit storage
- Add ad4081_chip_info with lvds_cnv_clk_cnt_max = 2
- Register AD4081 in device ID and OF match tables

Reviewed-by: Nuno Sá <nuno.sa@analog.com>
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

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Antoniu Miclaus 2025-10-07 11:15:25 +00:00 • committed by Jonathan Cameron

parent 83185903b4

commit d34ad64672

1 changed files with 15 additions and 0 deletions

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drivers/iio/adc/ad4080.c

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