clk: ls1028a: Add clock driver for Display output interface

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Add clock driver for QorIQ LS1028A Display output interfaces(LCD, DPHY),
as implemented in TSMC CLN28HPM PLL, this PLL supports the programmable
integer division and range of the display output pixel clock's 27-594MHz.

Signed-off-by: Wen He <wen.he_1@nxp.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lkml.kernel.org/r/20191213083402.35678-2-wen.he_1@nxp.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

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Wen He 2019-12-13 16:34:02 +08:00 • committed by Stephen Boyd

parent 87a5ffb34b

commit d37010a3c1

3 changed files with 297 additions and 0 deletions

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10

drivers/clk/Kconfig

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1

drivers/clk/Makefile

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286

drivers/clk/clk-plldig.c

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