Clock fixes for rk3328 and rk3288 and a new sub-type for an upcoming

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soc where mux and divider are not necessarily in the same register
 anymore.
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Merge tag 'v5.2-rockchip-clk-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-rockchip

Pull Rockchip clk driver updates from Heiko Stuebner:

 - Fixes for rk3328 and rk3288
 - New sub-type for an upcoming SoC where mux and divider
   are not necessarily in the same register anymore

* tag 'v5.2-rockchip-clk-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: undo several noc and special clocks as critical on rk3288
  clk: rockchip: add a COMPOSITE_DIV_OFFSET clock-type
  clk: rockchip: Turn on "aclk_dmac1" for suspend on rk3288
  clk: rockchip: Limit use of USB PHY clock to USB on rk3288
  clk: rockchip: Fix video codec clocks on rk3288
  clk: rockchip: Make rkpwm a critical clock on rk3288
  clk: rockchip: fix wrong clock definitions for rk3328

...

This commit is contained in:

Stephen Boyd 2019-04-25 08:56:23 -07:00

parent 9e98c678c2 f4033db5b8

commit d3dfc16f8f

4 changed files with 60 additions and 26 deletions

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36

drivers/clk/rockchip/clk-rk3288.c

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18

drivers/clk/rockchip/clk-rk3328.c

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9

drivers/clk/rockchip/clk.c

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23

drivers/clk/rockchip/clk.h

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