clk: renesas: r9a09g011: Add TIM clock and reset entries

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Add Compare-Match Timer (TIM) clock and reset entries to CPG
driver.

The TIM IP on the RZ/V2M comes with 32 channels, but the ISP has
full control of channels 0 to 7, and channels 24 to 31. Therefore
Linux is only allowed to use channels 8 to 23.

The TIM has shared peripheral clock with other modules, so mark it
as critical clock.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20221205145955.391526-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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Biju Das 2022-12-05 14:59:50 +00:00 • committed by Geert Uytterhoeven

parent ff1dd4a842

commit d459f557ad

1 changed files with 22 additions and 0 deletions

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drivers/clk/renesas/r9a09g011-cpg.c

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