drm/xe: batch CT pagefault acks with periodic flush

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Pagefault storms can generate long chains of acknowledgments back to the
GuC. Sending each ack as a full CT submission forces a barrier,
descriptor update and doorbell per fault.

Extend xe_guc_ct_send_locked() with a “defer-flush” mode that copies the
message into the H2G ring but defers publishing the descriptor and
ringing the doorbell. Add xe_guc_ct_send_flush() to publish pending
writes and notify GuC once per batch. Wire this into the pagefault
producer via new ack_fault_begin/ack_fault_end callbacks and CT lock
wrappers.

To avoid excessive flush latency while still amortizing MMIO costs, use
a simple periodic flush heuristic for GuC pagefault acks: batch most
acks as defer-flush and force a publish at a fixed interval (e.g., every
16th ack), with a final flush at end-of-batch.

Also increase the H2G CTB size to 16K to better absorb bursts.

Assisted-by: ChatGPT:gpt-5 # Documentation
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Francois Dugast <francois.dugast@intel.com>
Link: https://patch.msgid.link/20260806185202.3922432-12-matthew.brost@intel.com

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This commit is contained in:

Matthew Brost 2026-08-06 11:52:01 -07:00

parent dd157120f7

commit d4a7e16117

6 changed files with 172 additions and 25 deletions

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95

drivers/gpu/drm/xe/xe_guc_ct.c

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38

drivers/gpu/drm/xe/xe_guc_ct.h

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32

drivers/gpu/drm/xe/xe_guc_pagefault.c

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6

drivers/gpu/drm/xe/xe_guc_types.h

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12

drivers/gpu/drm/xe/xe_pagefault.c

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14

drivers/gpu/drm/xe/xe_pagefault_types.h

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