drm/i915: Catch GTT fault errors for gen11+ planes

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Gen11+ has more hardware planes than gen9 so we need to test additional
pipe interrupt register bits to recognize any GTT faults that happen on
these extra planes.

Bspec: 50335
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191008211716.8391-1-matthew.d.roper@intel.com

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This commit is contained in:

Matt Roper 2019-10-08 14:17:16 -07:00

parent 772d1dea1f

commit d506a65d56

2 changed files with 11 additions and 1 deletions

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4

drivers/gpu/drm/i915/i915_irq.c

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8

drivers/gpu/drm/i915/i915_reg.h

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