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drm/amd/display: update memclk clock table read for dcn42
Change memclk table to match dcfclk size to avoid fine grained mapping in dml2.1 Reviewed-by: Charlene Liu <charlene.liu@amd.com> Signed-off-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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