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ASoC: rt712-sdca: reconfigure PLL2 to fix calibration time-out
Add pll2 reconfiguration sequence in order to fix calibration time-out issue and to support 24.576MHz MCLK on specific platforms. Signed-off-by: Jack Yu <jack.yu@realtek.com> Link: https://patch.msgid.link/20260909085449.862350-1-jack.yu@realtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
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