drm/i915/xelpmp: Consider GSI offset when doing MCR lookups

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MCR range tables use the final MMIO offset of a register (including the
0x380000 GSI offset when applicable).  Since the i915_mcr_reg_t passed
as a parameter during steering lookup does not include the GSI offset,
we need to add it back in for GSI registers before searching the tables.

Fixes: a7ec65fc7e ("drm/i915/xelpmp: Add multicast steering for media GT")
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230214001906.1477370-1-matthew.d.roper@intel.com

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Matt Roper 2023-02-13 16:19:06 -08:00

parent 4583d6beb0

commit d6683bbe70

1 changed files with 4 additions and 1 deletions

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drivers/gpu/drm/i915/gt/intel_gt_mcr.c

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