tty: serial: fsl_lpuart: fix clearing of receive flag

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Commit 8e4934c6d6 ("tty: serial: fsl_lpuart: clear receive flag on FIFO
flush") implemented clearing of the receive flag by reading the status register
only. It turned out that even though we flush the FIFO afterwards, a explicit
read of the data register is still required.

This leads to a FIFO underrun. To avoid this, follow the advice in the overrun
"Operation section": Unconditionally clear RXUF after using RXFLUSH.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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Stefan Agner 2016-07-19 13:13:05 +05:30 • committed by Greg Kroah-Hartman

parent d6b0d2f243

commit d68827c62a

1 changed files with 6 additions and 3 deletions

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drivers/tty/serial/fsl_lpuart.c

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