drm/msm/dpu: offset HBB values written to DPU by -13

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[ Upstream commit 7ead14d4b9 ]

As in all other places, the Highest Bank Bit value should be programmed
into the hardware with the offset of -13.  Correct the value written
into the register to prevent unpredictable results.

Fixes: 227d4ce0b0 ("drm/msm: Offset MDSS HBB value by 13")
Tested-by: Val Packett <val@packett.cool> # x1e80100-dell-latitude-7455
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/699276/
Link: https://lore.kernel.org/r/20260119-msm-ubwc-fixes-v4-2-0987acc0427f@oss.qualcomm.com
Signed-off-by: Sasha Levin <sashal@kernel.org>

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Dmitry Baryshkov 2026-01-19 14:16:38 +02:00 • committed by Greg Kroah-Hartman

parent b573177b31

commit d791b31e7d

1 changed files with 6 additions and 4 deletions

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drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

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