drm/radeon/dce8: properly handle interlaced timing

The register bits changed on DCE8 compared to previous
families.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2012-07-11 18:02:10 -04:00
commit d798f2f2c3
2 changed files with 10 additions and 1 deletions