drm/i915/gt: Set CMD_CCTL to UC for Gen12 Onward

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Cache-control registers for Command Stream(CMD_CCTL) are used
to set catchability for memory writes and reads outputted by
Command Streamers on Gen12 onward platforms.

These registers need to point un-cached(UC) MOCS index.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Ayaz A Siddiqui <ayaz.siddiqui@intel.com>
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210903092153.535736-3-ayaz.siddiqui@intel.com

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Ayaz A Siddiqui 2021-09-03 14:51:50 +05:30 • committed by Ramalingam C

parent b62aa57e3c

commit d79a1d7131

2 changed files with 44 additions and 0 deletions

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27

drivers/gpu/drm/i915/gt/intel_workarounds.c

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17

drivers/gpu/drm/i915/i915_reg.h

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