x86/split_lock: Enumerate architectural split lock disable bit

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The December 2022 edition of the Intel Instruction Set Extensions manual
defined that the split lock disable bit in the IA32_CORE_CAPABILITIES MSR
is (and retrospectively always has been) architectural.

Remove all the model specific checks except for Ice Lake variants which are
still needed because these CPU models do not enumerate presence of the
IA32_CORE_CAPABILITIES MSR.

Originally-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/lkml/20220701131958.687066-1-fenghua.yu@intel.com/t/#mada243bee0915532a6adef6a9e32d244d1a9aef4

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This commit is contained in:

Fenghua Yu 2023-03-01 17:19:46 -08:00 • committed by Borislav Petkov (AMD)

parent 8cc68c9c9e

commit d7ce15e1d4

1 changed files with 22 additions and 37 deletions

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arch/x86/kernel/cpu/intel.c

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