arm64: dts: freescale: imx93-phyboard-segin: Set CMD/DATA SION bit to fix ERR052021

Browse source

Implement fix for i.MX 93 silicon errata ERR052021.

ERR052021 uSDHC: Sometimes uSDHC does not work under VDD_SOC low
		 drive mode and nominal mode
Description:
  uSDHC PADs have one integration issue.
  When CMD/DATA lines direction change from output to input, uSDHC
  controller begin sampling, the integration issue will make input
  enable signal from uSDHC propagated to the PAD with a long delay,
  thus the new input value on the pad comes to uSDHC lately. The
  uSDHC sampled the old input value and the sampling result is wrong.

Workaround:
  Set uSDHC CMD/DATA PADs iomux register SION bit to 1, then PADs will
  propagate input to uSDHC with no delay, so correct value is sampled.

This issue will wrongly trigger the start bit when sample the USDHC
command response, cause the USDHC trigger command CRC/index/endbit
error, which will finally impact the tuning pass window, especially
will impact the standard tuning logic, and can't find a correct delay
cell to get the best timing.

Based on commit bb89601282 ("arm64: dts: imx93-11x11-evk: set SION for
cmd and data pad of USDHC").

Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

...

This commit is contained in:

Primoz Fiser 2025-04-22 12:56:38 +02:00 • committed by Shawn Guo

parent ff44686256

commit d84fc1fc8e

1 changed files with 20 additions and 17 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

37

arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts

View file