spi: spi-fsl-dspi: Fix MCR register handling

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The MCR register is not changed, so initialize it in dspi_init().

The exception is the CLR_TXF and CLR_RXF bits, which should be written to
before each transfer to make sure we start with empty FIFOs.  With MCR
register now configured as volatile, the regmap_update_bits will do a real
read-modify-write cycle.

Signed-off-by: Esben Haabendal <eha@deif.com>
Acked-by: Martin Hundebøll <martin@geanix.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

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Esben Haabendal 2018-06-20 09:34:37 +02:00 • committed by Mark Brown

parent dadcf4abd6

commit d87e08f142

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drivers/spi/spi-fsl-dspi.c

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