drm/amd/powerplay: tag swSMU code layers

Browse source

Per designs, the swSMU code is separated into four layers. And the typical
calling flow should be like: amdgpu_smu.c -> ${asic}_ppt.c -> smu_v11/12_0.c
-> smu_cmn.c. Compile errors will come out for any violations. This can
help to prevent cross callings(e.g. amdgpu_smu.c -> ${asic}_ppt.c ->
amdgpu_smu.c -> ${asic}_ppt.c) which were common in our code.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

This commit is contained in:

Evan Quan 2020-07-08 12:45:00 +08:00 • committed by Alex Deucher

parent 704759315a

commit d8e0b16d81

13 changed files with 28 additions and 9 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

4

drivers/gpu/drm/amd/powerplay/amdgpu_smu.c

View file

3

drivers/gpu/drm/amd/powerplay/arcturus_ppt.c

View file

2

drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h

View file

3

drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h

View file

3

drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h

View file

3

drivers/gpu/drm/amd/powerplay/navi10_ppt.c

View file

3

drivers/gpu/drm/amd/powerplay/renoir_ppt.c

View file

3

drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c

View file

3

drivers/gpu/drm/amd/powerplay/smu_cmn.c

View file

2

drivers/gpu/drm/amd/powerplay/smu_cmn.h

View file

3

drivers/gpu/drm/amd/powerplay/smu_internal.h

View file

2

drivers/gpu/drm/amd/powerplay/smu_v11_0.c

View file

3

drivers/gpu/drm/amd/powerplay/smu_v12_0.c

View file