ARM: vexpress: Check master site in daughterboard's sysctl operations

With recent enough motherboard firmware, core tile can be fitted
in either of the two daughterboard sites. The non-DT tile code for
V2P-CA9 did not check that when configuring DVI output nor setting
CLCD pixel clock.

Fixed now, providing "get master site" API in motherboard's code.

Signed-off-by: Pawel Moll <pawel.moll@arm.com>
This commit is contained in:
Pawel Moll 2012-06-12 16:14:03 +01:00
commit d927daf5c8
3 changed files with 31 additions and 11 deletions