regulator: pfuze100: Fix n_voltages setting for SW2~SW4 with high bit set

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Current code adjust min_uV and uV_step but missed adjusting the n_voltages
setting.

When BIT6 is clear:
        n_voltages = (1975000 - 400000) / 25000 + 1 = 64
When BIT6 is set:
        n_voltages = (3300000 - 800000) / 50000 + 1 = 51

The n_voltages needs update because when BIT6 is set 0x73 ~ 0x7f are reserved.
When using regulator_list_voltage_linear, the n_voltages does matter here
because wrong n_voltages setting make the equation return wrong result.
e.g. if selector is 63, regulator_list_voltage_linear returns
     800000 + (50000 * 63) = 4000000
     It should return -EINVAL if the selector is in the range of 51 ~ 63.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>

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Axel Lin 2013-07-30 10:46:28 +08:00 • committed by Mark Brown

parent 2e04cc41a6

commit d9493234e2

1 changed files with 8 additions and 8 deletions

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drivers/regulator/pfuze100-regulator.c

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